Analog/Mixed-Signal IC Design Engineer

Campus

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Shanghai

  1. Responsible for the design and verification of analog and mixed-signal IPs, such as PLLs, ADCs/DACs, AFEs, various high-speed interfaces, clock custom circuits, and other mixed-signal IPs.
  2. Complete circuit design, simulation, and verification on schedule according to project timelines, guide the corresponding layout work, and prepare relevant documentation.
  3. Assist in the integration, verification, and backend design of the IP within SoC chips.
  4. Collaborate on chip post-silicon debugging and testing (Post-silicon Validation).
  1. Major in electronics, microelectronics, or related fields. Preference given to candidates with full tape-out experience.
  2. Possess a strong sense of responsibility and self-motivation, along with excellent teamwork spirit.
  3. Outstanding communication and presentation skills, capable of efficiently driving cross-departmental collaboration.
  4. Solid analytical and design capabilities. Familiarity with any of the following areas is preferred: SerDes, PLL/DLL, ADC/DAC, Custom Digital, AFE, Power.
  5. Familiar with common EDA tools and workflows, understanding of semiconductor devices and processes. Experience with advanced process nodes is preferred.
  6. Proficient in reading English technical materials and capable of writing technical specifications, design reports, and test reports in English.