Digital Verification Engineer

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Shanghai · Nanjing · Chengdu

  1. Collaborate with design and software teams to ensure comprehensive verification of chip functionality.
  2. Develop verification architecture.
  3. Model module and interface functionality.
  4. Define and execute verification plans.
  1. Bachelor’s degree or above; 1+ years of complex chip/FPGA module-level or chip-level verification experience (all technical levels).
  2. Strong sense of responsibility, self-motivated, and willing to help others.
  3. Easy to communicate with strong teamwork spirit.
  4. Proficient in SV/C++/Python/Perl.
  5. Familiar with UVM verification methodology.
  6. Experience with code coverage checking and formal verification.
  7. Preferred experience in IP verification: SerDes, PCIe, CPU Subsystem, Ethernet.